Ceramic Leadless Chip Carrier (LCC)

Electrical terminals are exposed from side walls to the bottom of a multilayer ceramic substrate.

Ceramic Pin Grid Array (CPGA)

Needle-like pins are set up in a grid array form and they are brazed on a multilayer ceramic substrate.

Ceramic Quad Flat Pack or Leaded Chip Carrier (CQFP) (LDCC)

Leadframes are brazed on the top or bottom of a multilayer ceramic substrate. Used for higher density and increased reliability for surface mount applications.

Ceramic Quad Flat Pack J-Lead (CQFJ)

Leadframes are brazed on the top of a multilayer ceramic substrate and the leads are J-formed for surface mounting.

Ceramic Small Outline Integrated Circuit (SOIC)

Surface mount package with .050” lead spacing providing comparable foot print with wide body SOP plastic packaging.

Cerquad

Leadframes are attached on a press formed single-layer ceramic substrate by using crystallized glass.

Side Braze (DIP)

Leadframes are brazed on two sides of a multilayer ceramic substrate. So they are often called side brazed packages.

TO - Header

Single piece construction without sidewalls to aid circuit installation, inspection and test accessibility.